This week TSMC has disclosed its full quarterly financial results for Q1 2021. In those results the company often explains where the revenue demand is for its technologies, and the financial split the demand brings. This number is not correlated to wafer production (although TSMC provides an overall number too), given that smaller process nodes have a per-wafer premium, but it does indicate where the demand is in the market right now. As perhaps to be expected, 7nm takes top billing, however a couple of interesting numbers come out of the data.
Interposers. EMIB. Foveros. Die-to-die stacking. ODI. AIB.TSVs. All these words and acronyms have one overriding feature – they are all involved in how two bits of silicon physically connect...16 by Dr. Ian Cutress on 9/2/2020
High-performance computing chip designs have been pushing the ultra-high-end packaging technologies to their limits in the recent years. A solution to the need for extreme bandwidth requirements in the...35 by Andrei Frumusanu on 8/25/2020
Whilst process node technologies and Moore’s Law are slowing down, manufacturers and chip designers are looking to new creative solutions to further enable device and performance scaling. Advanced packaging...19 by Andrei Frumusanu on 8/25/2020
I’ve maintained for a couple of years now that the future battleground when it comes to next-generation silicon is going to be in the interconnect – implicitly this relies...15 by Dr. Ian Cutress on 8/25/2020
With transistor shrinks slowing and demand for HPC gear growing, as of late there has been an increased interest in chip solutions larger than the reticle size of a...18 by Anton Shilov on 3/4/2020
Arm and TSMC this week unveiled their jointly developed proof-of-concept chip that combines two quad-core Cortex-72-based 7 nm chiplets on TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) interposer. The two chips are connected...26 by Anton Shilov on 9/27/2019